1. Field of the Invention
The present invention relates to non-volatile memory cells and to push-pull non-volatile memory cells. More particularly, the present invention relates to simultaneous programming of the n-channel and p-channel non-volatile memory devices in a push-pull non-volatile memory cell.
2. The Prior Art
Push-pull flash memory cells are known in the art. These memory cells have been previously programmed in two steps, e.g., first programming the p-channel non-volatile transistor and then programming the n-channel non-volatile transistor.
Previous push-pull memory cells and programming methods have suffered from several drawbacks. First, the two-step programming of the p-channel non-volatile transistor and the n-channel non-volatile transistor takes additional time, especially in larger arrays. In addition, relatively higher gate-induced drain leakage and high p-channel volatile transistor gate stress of unselected cells might occur during programming.